1. Field
One or more embodiments of the present invention relate to a system for compressing and/or reconstructing images, and more particularly, to an image encoder/decoder system suitable for Liquid Crystal Display Dynamic Capacitance Compensation (LCD DCC) devices.
2. Description of the Related Art
FIG. 1 illustrates a portion of a conventional Liquid Crystal Display Dynamic Capacitance Compensation (LCD DCC) device.
Referring to FIG. 1, this conventional LCD DCC device includes a memory 11 and a Lookup Table (LUT) module 12. The LCD DCC device is used to apply a voltage higher than a required voltage to the pixels of a Thin Film Transistor (TFT)-LCD panel, in order to enhance the response time of the TFT-LCD panel. For example, if a current voltage of a pixel in the TFT-LCD panel is A and the following voltage of the pixel is B, the LCD DCC device applies the voltages to the pixel in the order of A->C->B (where C is a voltage higher than A or B) without applying the voltages to the pixel in the order of A->B. Hereinafter, a process in which a LCD DCC device calculates a voltage value for enhancing the response time of a TFT-LCD panel will be described, and then problems of such conventional techniques will be described.
Referring to FIG. 1, the memory 11 receives and stores information of a current picture. When the information of the current picture is received, information of the previous picture is already stored in the memory 11.
The LUT module 12 calculates a voltage value required to achieve a target response time of a TFT-LCD panel, with reference to a lookup table. In more detail, the LUT module 12 searches for voltage value information corresponding to a difference between the luminance value of a certain pixel of a currently received picture and the luminance value of the corresponding pixel of the previous picture stored in the memory 11, from the lookup table, and calculates a voltage value required to achieve the target response time of the TFT-LCD panel, using the voltage value information and information on the target response time of the TFT-LCD panel.
As described above, in order to calculate the voltage value required to achieve the target response time of the TFT-LCD panel, information of the previous picture must be stored in the memory 11. The higher the picture quality, the larger the amount of data of the picture. Accordingly, a variety of techniques for compression-storage of pictures in a memory have been proposed. Conventional image compression techniques include the JPEG (Joint Photographic Experts Group) standard, the H.264 (intra coding) standard, the JPEG-LS standard, etc. However, these standards have the following problems when they are applied to LCD DCC devices.
First, there is a picture quality problem that occurs. When image data is compressed to ½-⅓ the size of the original image data, according to any one of the above-mentioned image compression methods, no significant problems occur in view of objective picture quality, e.g., measured by a Peak Signal-to-Noise Ratio (PSNR). However, in the case of the JPEG or H.264 standard based on transform coding, subjective picture quality performance deteriorates. In particular, based on a phenomenon in which the edge portions of an image appear crushed, a subjective interpretation of video quality may be that picture quality has deteriorated along the edge portions. Since LCD DCC devices drive a TFT-LCD channel that is to be shown directly to people, such subjective picture quality tends to be more important than objective picture quality in compression codecs for LCD DCC. That is, the compression codecs for LCD DCC devices typically should provide high picture quality performance so that people should not recognize the differences between pixel values caused by image compression.
Another problem related to transform coding compression occurs when images shift in units of a pixel, e.g., with an object within the image moving, thereby shifting pixel values among neighboring pixels. Though there may be no apparent difference between an original image and its reconstructed image when the original image is shifted in a unit of each pixel, when an original image is transform coding compressed and reconstructed a slight difference between pixel values within the same particular block has substantial influence on the reconstructed image. Accordingly, when an image is shifted in a unit of a pixel and input to an LCD DCC device even a slight difference between pixel values will be easily recognized by users.
Second, since all of the above-mentioned image compression techniques are based on entropy coding, a critical path happens when images are decoded, and accordingly the complexity of a decoder significantly increases. Here, “critical path” means the longest process path among process paths that must be concurrently performed to complete all required processes. That is, “critical path” means a path requiring the longest process time among all process paths. In particular, in the case of the JPEG and H.264 standards that perform transform coding in a unit of a block, the complexity of a decoder further increases. Furthermore, since the H.264 standard uses intra prediction, the amount of memory use increases and the complexity of a decoder further increases.
Third, all of the above-mentioned image compression techniques allow bit rate control to some degree, however, they cannot generate an exact bit rate. For example, when the above-mentioned image compression techniques control a bit rate to achieve ½ compression, the bit rate will be limited within ½ compression due to the capacity limitation of a memory used in the corresponding LCD DCC device. If bit rate control is successfully performed according to one of the above-mentioned image compression techniques, the amount of data is generated at a ½ compression rate. However, if bit rate control fails, the amount of data may be generated at a compression rate lower than the ½ compression rate. Therefore, the above-mentioned techniques are not suitable for image compression for LCD DCC devices which uses a fixed capacity of a memory.